The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device, for example, those suited for use in a semiconductor device equipped with a rewiring and a solder ball.
Semiconductor device packages such as flip chip ball grid array (FC-BGA), wafer level chip size package, and the like have been used frequently in order to meet the demand for high-performance, high-function, and high density electronic devices. For example, in the wafer level chip size package, after a series of steps for forming elements, wirings, and the like on a substrate (wafer), a passivation film is formed, a rewiring and a solder ball are formed on the resulting passivation film, and then, the resulting substrate is divided into individual chips. Patent Documents 1 and 2 disclose such a chip size package.
A semiconductor device is, for example, that including a flash memory as a nonvolatile memory. Such a semiconductor device receives a memory retention test of data stored in the flash memory. In the memory retention test, whether or not the data (memory) disappear by baking (retention baking) at 250° C. for about 12 hours is determined. Since the baking temperature (250° C.) approximates to the melting point of a solder ball, the memory retention test cannot be performed after formation of the solder ball.
The memory retention test may then be performed before formation of a rewiring or after formation of a rewiring but before formation of a solder ball. Based on various technological situations, the present inventors have decided to perform the memory retention test before formation of a solder ball after formation of a rewiring.
A rewiring is a wiring for electrically coupling an aluminum electrode (pad) below a passivation film to a solder ball and as a material of it, copper (Cu) having a relatively low resistance is used. The rewiring made of copper is presumed to adversely affect a semiconductor device because tin (Sn) contained in the solder ball diffuses copper. In order to prevent it, a nickel film is formed as a barrier film on the surface of the rewiring. Further, in the rewiring, a thin gold film is formed as a wetting layer on the surface of the nickel film in order to achieve good coupling between the solder ball and the rewiring. The gold film is formed by substitution gold plating.
The memory retention test is performed by bringing a probe needle into contact with the gold film. After the memory retention test, the solder ball is coupled to the gold film, visual inspection and the like are performed, and then, the wafer is divided into semiconductor chips by dicing in the scribe region. Thus, manufacture of a semiconductor chip is completed.
[Patent Document 1] Japanese Unexamined Patent Application Publication No. 2001-53075
[Patent Document 2] Japanese Unexamined Patent Application Publication No. 2000-138316